Two Stage CMOS Op-amp

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\begin{tikzpicture}
%--------start graphics code --------
%Grid for intial drawing.
%Comment next three lines once typesetting finished
\def\figHt{6};
\def\figWd{10};
\draw[step=0.5,very thin, black!20] (-0.5,-0.5) grid (\figWd,\figHt);
\foreach \x in {0,...,\figWd} {\node [anchor=north] at (\x,-0.5) {\x};}
\foreach \y in {0,...,\figHt} {\node [anchor=east] at (-0.5,\y) {\y};}
 
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%%%%%%%%%%%%%%% NMOS current mirror %%%%%%%%%%%%%%
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
\coordinate (ref_node1) at (0,0);
\coordinate (ref_node1T) at ($(ref_node1)+(0,\figHt)$); 
%Instantiation of components
\draw (ref_node1) node[nmos,anchor=source,xscale=-1] (Mt1){};
\draw (ref_node1T) to [I] (Mt1.drain);
%Inter-connections
\draw (Mt1.drain) node[circ] -| (Mt1.gate);
% Numbering the components
\draw (Mt1.base) node[left]{$M_{t1}$};
%Ground and Vdd lines
\draw (Mt1.source) node[ground]{}; 
 
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%%%%%%%%%%%%%%% Differential pair  %%%%%%%%%%%%%%%
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
\coordinate (ref_node) at (4.5,0); 
\coordinate (ref_nodeT) at ($(ref_node)+(0,\figHt)$); 
%Component instantiation
\draw (ref_node) node[nmos,anchor=source] (M0){}
      (ref_node) ++(-1.5,2) node[nmos, anchor=source] (M1){}
      (ref_node) ++(1.5,2) node[nmos, anchor=source, xscale=-1] (M2){}
      (ref_nodeT) ++(-1.5,0) node[pmos, anchor=source, xscale=-1] (M3){}
      (ref_nodeT) ++(1.5,0) node[pmos, anchor=source] (M4){} ;
%Inter-connections
\draw (M1.drain) -- (M3.drain)node[circ] -| (M3.gate) node[circ] -- (M4.gate);
\draw (M4.drain) -- (M2.drain);
\draw (M1.source) |- (M0.drain) node[circ] -| (M2.source);
% Numbering the components
\draw (M0.base) node[right]{$M_0$}
      (M1.base) node[right]{$M_1$}
      (M2.base) node[left] {$M_2$}
      (M3.base) node[left] {$M_3$}
      (M4.base) node[right]{$M_4$};
\draw (M1.gate) node[ocirc] node[left] {$v_{ip}$}
      (M2.gate) node[ocirc] node[right]{$v_{im}$};
  %    (M2.drain) node[circ] -- ++(0.5,0) node[ocirc](vout){} node[right]{$v_{out}$};
%Ground and Vdd lines
\draw (M0.source) node[ground]{};
%\draw (M3.source) -- ++(1.5,0) node[anchor=south] {$V_{DD}$} -- (M4.source);
 
 
%###########################################%
%%%%%%%%%% common source amplifier %%%%%%%%%%
%###########################################%
\coordinate (ref_node2) at (9,0);
\coordinate (ref_node2T) at ($(ref_node2)+(0,\figHt)$);
%Instantiation of components
\draw (ref_node2) node[nmos,anchor=source] (M20){};
\draw (ref_node2T)node[pmos,anchor=source] (M21){}; 
%Inter-connections 
\draw (M20.drain) -- (M21.drain) ;
% Numbering the components and naming the nodes
\draw (M20.base) node[right]{$M_{20}$};
\draw (M21.base) node[right]{$M_{21}$};
\draw (M20.drain) node[circ] 
           -- ++(0.5,0) node[ocirc] node[right]{$v_{out}$};
%Ground and Vdd lines
\draw (M20.source) node[ground]{}; 
 
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%%%%%%%%%%% TOP LEVEL INTERCONNECTIONS %%%%%%%%%%%
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
\draw (Mt1.gate) node[circ] -- (M0.gate) -- (M20.gate);
\draw (ref_node1T) |- (M3.source) node[circ]{} 
      to node[above]{$V_{DD}$} (M4.source)node[circ]{}  -- (M21.source);
\draw ($(ref_nodeT)+(1.5,-2)$) node[circ]{} to +(0.5,0)  
      coordinate (capnode) to [C,l=$C_c$] ($(ref_node2T)+(0,-2)$) node[circ]{};
\draw (capnode) node[circ]{} |- (M21.gate) ;
%--------end graphics code ----------
\end{tikzpicture}